FIG. 8 is a block diagram of a prior art direct digital synthesizer (hereinafter referred to as DDS). In the figure, an integrator 1 is provided for performing an integration of a frequency value f that is input to the integrator 1, upon receipt of each master clock. A memory 3 is provided for outputting required data in response to the signal output from the integrator 1, storing data of phase resolution from 0.degree..about.360.degree.. A D/A converter 4 is provided for D/A converting the signal output from the memory 3. A low-pass filter (hereinafter referred to as LPF) 5 is provided for receiving the signal output from the D/A converter 4. A master clock MC is input to the integrator 1 and the D/A converter 4.
A description is given of the operation of this prior art DDS.
A frequency value f in a digital form corresponding to a required frequency is input to the integrator 1. A master clock MC is input to the integrator 1, and each time when this clock is input the frequency value f is integrated. The output of the integrator 1 is input to the memory 3 as address data. This memory 3 stores amplitude data of a sinusoidal wave, and amplitude data of the sinusoidal wave is output that varies each time the input address, i.e., phase value of the sinusoidal wave varies.
The output of this memory 3 is input to the D/A converter 4 to which the master clock MC is input, and is converted into an analog signal. As a result, a sinusoidal wave which is converted into an analog signal is output from the D/A converter 4. Further, the output of the D/A converter 4 becomes a sinusoidal wave in which harmonic wave components are removed by the low-pass filter 5.
The prior art digital synthesizer is constructed as described above, and the memory for converting the phase value of the sinusoidal wave into an amplitude value stores data of phase resolution from 0.degree..about.360.degree., and if the phase resolution is increased, the capacity of the memory increases exponentially by that degree, thereby increasing the gate size of the memory and increasing the power consumption.